1. Field of Invention
The present invention relates to DC-to-DC or DC-to-AC poly-phase converters, and more particularly to Single-switched Resonant DC Link (SRDCL) converters, employing power devices, which switch with zero voltage switching condition.
2. Description of Prior Art
Power devices can experience considerable loss during switching losses. A cause of this loss is that during the switching process the current and the voltage of the device can be simultaneously non-zero. This problem was addressed in U.S. Pat. No. 4,730,242 issued on May 8, 1988, describing a Resonant DC Link (RDCL) converter. A related actively clamped RDCL converter is shown in U.S. Pat. Nos. 4,864,483 and 5,038,267. A corresponding method for detecting zero voltage conditions is described in U.S. Pat. No. 5,166,549 issued on Nov. 24, 1992.
However, an aspect of the actively clamped RDCL converters is the high voltage stress on the main converter switches, because the voltage stress by the natural resonance can be 2–3 times higher than the input DC source voltage, as described by In-Hwan, et al. in “Simple Soft-Switched PWM Inverter Using Source Voltage Clamped Resonant Circuit,” IEEE Tran. on Industrial Electronics Vol. 46, pp. 468–471, April 1999]. To relieve this high voltage stress problem, alternative parallel resonant circuits and DC rail soft-switched resonant circuits are described in U.S. Pat. No. 5,111,374 issued on May 5, 1992; U.S. Pat. No. 5,172,309 issued on Dec. 15, 1992; U.S. Pat. No. 5,412,557, issued on May 2, 1995, and U.S. Pat. No. 5,559,685 issued on Sep. 24, 1996. However, these schemes require two or three more switches and hence are still quite expensive and complex approaches. The clamped RDCL converter disclosed in U.S. Pat. No. 5,617,308 uses only one switch to achieve the soft switching. But the resonant link voltage in this patent may be significantly increased because the clamping capacitor is charged by a reactive energy of the inductive load.
The link voltage can be clamped by a synchronized resonant DC link converter for the soft-switched PWM using a simple implementation and easy control, as described by D. M. Divan, et al. in: “Design Methodologies for Soft Switched Inverters,” IEEE Trans. on Ind. Appl., Vol. 29, No. 1, pp. 126–135, January/February, 1993]. This SRDCL scheme can clamp the peak voltage stress, but the peak voltage of the SRDCL converter is still higher than Vdc. In addition, the DC link voltage may be greatly increased, when the load current changes because the load current charges the clamping capacitor. Moreover, the current stress on the resonant switch may be large, since the load current overlaps with the resonant current, as can be seen from the experimental results shown in FIGS. 6A and 6B, as discussed by In-Hwan Oh et al in, “A Source Voltage Clamped Resonant Link Inverter for a PMSM using a Predictive Current Control Technique”, IEEE Transactions on Power Electronics, Vol. 14, No. 6, pp. 1122–1132, November 1999].
A particular feature of the above-described converters is that the auxiliary power device of the resonance of DC link is placed into the power line. Such topologies cause a power loss by the load current, while the DC link voltage is at a nominal voltage level.